AS/400 System History & Complete Guide

The IBM System i is a family of midrange computers from IBM. It was first introduced as the AS/400 (Application System/400) in June 1988, alongside the OS/400 operating system. It was intended as the successor to IBM's System/36 and System/38 platforms. Early AS/400 systems used the same IMPI architecture as the System/38, but later systems moved to the PowerPC-based IBM RS64.

It was re-branded multiple times by IBM: first as the AS/400 Advanced Series in 1994, followed by AS/400e (the "e" standing for e-business) in 1997, eServer iSeries in 2000, eServer i5 (along with OS/400 becoming i5/OS) in 2004, and finally System i in 2006.

In April 2008, System i and System p were consolidated into the IBM Power Systems platform. The i5/OS operating system was rebranded to IBM i, and retained full backwards compatibility with the previous hardware platforms.

Rebranding Timeline

  • 1988 – AS/400 (Application System/400) launched
  • 1994 – AS/400 Advanced Series
  • 1997 – AS/400e (the "e" stands for e-business)
  • 2000 – eServer iSeries
  • 2004 – eServer i5 (OS/400 becomes i5/OS)
  • 2006 – System i
  • 2008 – Merged into IBM Power Systems (i5/OS becomes IBM i)

Summary

The predecessor to AS/400, IBM System/38, was first made available in August 1979 and was marketed as a minicomputer for general business and departmental use. It was sold alongside other product lines, each with a different architecture (System/3, System/32, System/34, System/36).

Realizing the importance of compatibility with the thousands of programs written in legacy code, IBM launched the AS/400 midrange computer line in 1988. "AS" stands for "Application System." Great effort was made during development of the AS/400 to enable programs written for the System/34 and System/36 to be moved to the AS/400. Programs on the System/38 were directly compatible with the new AS/400 after being "re-encapsulated" by the operating system.

In 2000, in accordance with IBM's eServer initiative, the AS/400 series was rebranded as the eServer iSeries. In 2006, it was again rebranded as the IBM System i. In 2008, almost 20 years after being introduced, the System i and IBM System p product lines were combined into the IBM Power Systems line.

The AS/400 operating system was originally named OS/400 (following the naming pattern begun with OS/360 and continued with OS/2). The operating system was renamed i5/OS to correspond with the introduction of POWER5 processors and the rebranding of the hardware to eServer iSeries. In 2008, it was renamed again to IBM i, alongside the introduction of IBM Power Systems.

The operating system is object-based. Features include a relational database management system (DB2/400), a menu-driven interface, support for multiple users, block-oriented terminal support (IBM 5250), and printers. IBM i has built-in security, and support for communications and web-based applications, which can run inside the optional IBM WebSphere Application Server or as PHP/MySQL applications inside a native port of the Apache web server.

Unlike the "everything is a file" model of Unix and its derivatives, on IBM i everything is an object, with built-in persistence and garbage collection. IBM i also offers Unix-like file directories through the Integrated File System. Java compatibility is implemented through a native port of the Java virtual machine.

Like IBM's mainframe operating systems, IBM i uses EBCDIC as its inherent encoding.

OS/400 Version 4, Release 4 (V4R4) introduced LPARs (logical partitions), allowing multiple virtual systems to run on a single hardware footprint.

Features

The IBM System i platform extended the System/38 architecture of an object-based system with an integrated DB2 relational database. Equally important are the virtual machine and single-level storage concepts which established the platform as an advanced business computer.

Instruction Set

One feature that has contributed to the longevity of the IBM System i platform is its high-level instruction set, known as TIMI (Technology Independent Machine Interface), which allows application programs to take advantage of advances in hardware and software without recompilation. TIMI is a virtual instruction set independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, ensuring hardware independence — conceptually similar to the virtual machine architecture of environments such as Java and .NET.

Unlike other virtual-machine architectures where virtual instructions are interpreted at run time, TIMI instructions are never interpreted. They form an intermediate compile-time step and are translated into the processor's instruction set as the final compilation step. The TIMI instructions are stored within the final program object alongside the executable machine instructions. This is how application objects compiled on one processor family (for example, the original CISC AS/400 48-bit processors) could be moved to a new processor family (such as 64-bit PowerPC) without recompilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform, where the operating system discards the old machine instructions and re-translates the TIMI instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was an original design feature of the System/38 in the mid-1970s, planned for future processors, memory, and expanded address space. The original AS/400 CISC models used the same 48-bit address space as the System/38. That address space was expanded in 1995 when the RISC PowerPC RS64 64-bit CPU replaced the 48-bit CISC processor.

For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer, versus 48 bits on the System/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set — the single-level storage concept.

Software

The IBM System i includes an operating system originally known as OS/400, later renamed i5/OS and then IBM i. System i is also capable of supporting multiple instances of AIX, Linux, Lotus Domino, and Microsoft Windows. While OS/400, AIX, Linux, and Lotus Domino run on POWER processors, Windows is supported through single-processor internal blade servers or externally linked multiple-processor servers. Windows, Linux, and VMware ESX are supported on iSCSI-attached servers.

LPAR (Logical Partitioning), a feature introduced from IBM's mainframe computers, allows multiple operating systems to run simultaneously on one IBM System i unit. A system configured with LPAR can run various operating systems on separate partitions while ensuring that one OS cannot consume the memory or resources of another. Each LPAR is given a portion of system resources (memory, hard disk space, and CPU time) through a system of weights that determines how unused resources are allocated. The operating systems commonly used under the LPAR scheme are IBM i, AIX, and Linux.

Other features include an integrated DB2 database management system, a menu-driven interface, multi-user support, non-programmable terminals (IBM 5250) and printers, security, communications, and client–server and web-based applications. Much of the software necessary to run IBM System i is included and integrated into the base operating system.

IBM System i also supports common client–server standards such as ODBC and JDBC for accessing its database from client software such as Java, Microsoft .NET languages, and others.

History

The IBM System i, then known as the AS/400, was the continuation of the System/38 database machine architecture, announced by IBM in October 1978 and delivered in August 1979. The AS/400 removed capability-based addressing and added source compatibility with the System/36, combining the two primary computers manufactured by the IBM Rochester plant. The System/36 was IBM's most successful minicomputer, but the architecture had reached its limit.

The first AS/400 systems (development code names "Silverlake," named for Silver Lake in downtown Rochester, Minnesota, where development took place, and "Olympic") were delivered in 1988 under the tagline "Best of Both Worlds," and the product line has been refreshed continually since. The programmers who worked on OS/400 did not have a Unix background; chief architect Dr. Frank Soltis noted this as a key difference between OS/400 and other operating systems of its era.

The AS/400 was one of the first general-purpose computer systems to attain a C2 security rating from the NSA, and in 1995 it was extended to employ a 64-bit processor and operating system.

The 1995 change-over from IMPI (48-bit addresses) to PowerAS (64-bit addresses) required that all programs be "observable," meaning the debugging information had not been stripped from the compiled code. This caused problems for customers who had bought third-party products with no source and no observability. In 2008, the release of i5/OS V6R1 (later IBM i 6.1) caused similar issues due to changes to the TIMI in that release.

In 2000, IBM renamed the AS/400 to iSeries as part of its eServer branding initiative. At that time it adopted more PC-server-like features, such as standard keyboards, mice, and VGA video output, replacing older proprietary technologies. In 2001, it switched to the POWER4 processor from the PowerAS processors used by previous generations.

The product line was extended further in 2004 with the introduction of the i5 servers, the first to use the IBM POWER5 processor. The architecture was designed to allow for future 128-bit processors as they become available.

Although announced in 1988, the AS/400 remains one of IBM's most significant architectures developed wholly in-house. Since the early 1990s, IBM has generally grown its product lines through acquisition and the adoption of open standards such as Linux rather than large internal platform development. The AS/400 was widely regarded as one of IBM's most valuable and defensible product lines through the 1990s; Microsoft itself ran many of its own business and financial systems on the AS/400 platform until around 1999, when it transitioned to Windows 2000.

Hardware

The AS/400 was originally based on a custom IBM CISC CPU with an instruction set architecture known as IMPI (Internal Microprogrammed Interface), similar to that of the IBM System/370. It was later migrated to a POWER-based RISC CPU family, eventually known as RS64.

CPU Generations

The System i5 used POWER CPUs, developed and manufactured by IBM. The POWER4, POWER5, and POWER5+ chips contain two cores. Multi-Chip Modules (MCM) are available with two CPUs (four cores) or four CPUs (eight cores) per module.

CPUYearClock SpeedPlatformServer Models
IMPI 1988 > 22 MHz AS/400 Bxx, Cxx, Dxx, Exx, Fxx, Pxx, 100, 135, 140, 2xx, 3xx
Cobra (A10) 1995 55 or 75 MHz AS/400 4xx, 5xx
Muskie (A25/A30) 1996 125 or 154 MHz AS/400 53x
Apache / RS64 (A35) 1997 125 MHz AS/400 6xx, 150
NorthStar (RS64 II) 1998 200, 255 or 262 MHz AS/400 170, 250, 7xx, 650, S40, SB1
Pulsar (RS64 III) 1999 450 MHz iSeries / System i 270, 820
IStar (RS64 III upgraded) 2000 400, 500, 540 or 600 MHz iSeries / System i 820, 830, 840, SB2, SB3
SStar (RS64 IV) 2000 540, 600 or 750 MHz iSeries / System i 270, 800, 810, 820, 830, 840
POWER4 2001 1.1 or 1.3 GHz iSeries / System i 890
POWER4+ 2003 1.9 GHz iSeries / System i 825, 870
POWER5 2004 1.5 or 1.9 GHz iSeries / System i i5-520, i5-550, i5-570, i5-595
POWER5+ 2005 1.5–2.3 GHz iSeries / System i i5-520, i5-550, i5-515, i5-525, i5-570
POWER6 2007 3.5–4.7 GHz iSeries / System i BladeCenter JS12, JS22; i5-570 (MMA); M50, M25, M15
POWER6+ since 2009 3.6–5.0 GHz iSeries / System i BladeCenter JS12, JS22, JS23, JS43; Power 520, 550, 560, 570, 575, 595
POWER7 2010 3.3–4.2 GHz Power Systems BladeCenter PS700, PS701, PS702; PureSystems p260, p460, p24L; PowerLinux 7R1, 7R2; Power 710–795
POWER7+ 2012 3.7–4.4 GHz Power Systems BladeCenter PS703, PS704; PureSystems p260, p460, p24L; PowerLinux 7R1, 7R2; Power 710–795
POWER8 2014 2.5–5.0 GHz Power Systems Power S812L, S814, S822, S822L, S824, S824L, S812LC, S821LC, S822LC; Power E850, E870, E880
POWER9 2017 4 GHz Power Systems Power AC922, L922, S914, S922, S924, H922, H924, E950, E980
POWER10 2021 3.5–4.0 GHz Power Systems S1012, S1014, S1022, S1022s, S1024, E1050, E1080
POWER11 2025 3.0–4.4 GHz Power Systems S1112, S1122, S1124, E1150, E1180

Note: there were at least two generations of IMPI processors; the second was released in 1991, with a processor clock cycle of 45 ns worst case.

 

Server Models

ModelYearCPU GroupBase CPW
B10, B20, B30, B35, B40, B45, B50, B60, B70 1988, 1989 P10, P20 2.9 – 20
C04, C06, C10, C20, C25 1990 P10 3.1 – 6.1
D02, D04, D06, D10, D20, D25, D35, D45, D50, D60, D70, D80 1991 P10, P20, P30 3.8 – 56.6
E02, E04, E06, E10, E20, E25, E35, E45, E50, E60, E70, E80, E90, E95 1992 P10, P20, P30, P40 4.5 – 116.6
F02, F04, F06, F10, F20, F25, F35, F45, F50, F60, F70, F80, F90, F95, F97 1993 P05, P10, P20, P30, P40 5.5 – 177.4
P01, P02, P03 1993–1995 P05 7.3 – 16.8
150 1996 P05 10.9 – 35.0
S10, S20, S30, S40 1997 P05, P10, P20, P30, P40, P50 45.4 – 4550
SB1, SB2, SB3 1997, 2000 P30, P40 1794 – 16500
10S, 100, 135, 140 1993–1995 P05, P10, P20 17.1 – 65.6
170 1998 P05, P10, P20 30 – 1090
200, 20S, 236 1994 P05, P10 7.3 – 17.1
250 2000 P05 50 – 75
270 2000 P05, P10, P20 50 – 2350
300, 30S, 310 1994 P10, P20, P30, P40 11.6 – 177.4
400, 40S, 436 1995 P05, P10 13.8 – 91.0
500, 50S, 510, 530, 53S 1995 P10, P20, P30, P40 18.7 – 650
600, 620, 640, 650 1997 P05, P10, P20, P30, P40, P50 22.7 – 4550
720 1999 P10, P20, P30 240 – 1600
730 1999 P20, P30, P40 560 – 2890
740 1999 P40, P50 3660 – 4550
800 2003 P05, P10 300 – 950
810 2003 P10, P20 750 – 2700
820 2000, 2001 P05, P10, P20, P30, P40 100 – 3700
825 2003 P30 3600 – 6600
830 2000, 2002 P20, P30, P40, P50 1850 – 7350
840 2000–2002 P40, P50 10000 – 20200
870 2002 P40, P50 7700 – 20000
890 2002 P50, P60 20000 – 37400
520 2004–2006 P05, P10, P20 500 – 7100
550 2004–2006 P20 3300 – 14000
570 2004–2006 P30, P40 3300 – 58500
595 2004–2006 P50, P60 24500 – 216000
515 2007 P05 3800 – 7100
525 2007 P10 3800 – 7100
570 2007 P40 16700 – 58500
MMA (9406) 2007 P30 5500 – 76900
M15 2008 P05 4300
M25 2008 P10 4300 – 8300
M50 2008 P20 4800 – 18000
MMA 2008 P30 8150 – 76900
JS12 2008 P05 7100
JS22 2008 P10 13800
JS23 2008
JS43 2008
570 (9117) 2008 P30 104800
595 (9119) 2008 P60 294700

 

Current Power Systems Models (Power9 – Power11)

IBM stopped publishing a single comparable Base CPW figure once Power Systems began running AIX, IBM i, and Linux side by side on the same hardware, so the table below picks up where the legacy CPW table leaves off, tracking model, machine type, and core/memory capacity through the current Power11 generation. Model names link to full specifications and pricing on Midland Information Systems.

ModelMachine TypeYearSockets / CoresMax Memory
Power9
S914 9009-41G 2018 1 socket, up to 8 cores up to 1 TB
S922 9009-22G 2018 2 sockets, up to 20 cores up to 4 TB
S924 9009-42G 2018 2 sockets, up to 24 cores up to 4 TB
H922 9223-22H 2018 2 sockets, up to 20 cores up to 4 TB
H924 9223-42H 2018 2 sockets, up to 24 cores up to 4 TB
E950 9040-MR9 2018 4 sockets, up to 48 cores up to 16 TB
E980 9080-M9S 2018 up to 16 sockets, up to 192 cores up to 64 TB
Power10
S1012 9028-21B 2022 1 socket, up to 8 cores up to 256 GB
S1014 9105-41B 2021 1 socket, up to 8 cores up to 1 TB
S1022s 9105-22B 2021 2 sockets, up to 16 cores up to 2 TB
S1022 9105-22A 2021 2 sockets, up to 40 cores up to 4 TB
S1024 9105-42A 2021 2 sockets, up to 48 cores up to 8 TB
E1050 9043-MRX 2022 4 sockets, up to 96 cores up to 16 TB
E1080 9080-HEX 2021 up to 16 sockets, up to 240 cores up to 34 TB
Power 11
S1112 9242-21B 2025 1 socket, up to 10 cores
S1122 9824-22A 2025 2 sockets, up to 60 cores up to 4 TB
S1124 9824-42A 2025 2 sockets, up to 60 cores up to 8 TB
E1150 9043-MRU 2025 4 sockets, up to 120 cores up to 16 TB
E1180 9080-HEU 2025 up to 8 sockets, up to 120 cores per node (256 cores max, multi-node) up to 16 TB per node (64 TB max, multi-node)